istyle

Fast and Free Automatic Formatter for Verilog Source Code

iStyle is a fast and free automatic formatter for Verilog source code. It was originally created by haimag and is inspired by Astyle. iStyle helps to standardize code formatting in Verilog projects by automatically adjusting indentation, spacing, and bracket placement according to configurable style options.

homepage ↗ github: thomasrussellmurphy/istyle-verilog-formatter